| PART |
Description |
Maker |
| W9725G6KB25A W9725G6KB-25 W9725G6KB-18 W9725G6KB-3 |
DLL aligns DQ and DQS transitions with clock, Data masks (DM) for write data, Write Data Mask
|
Winbond
|
| 422B 422E |
Max voltage:24V; 200mA; data processing data line protector. For data processing equipment, long line transmission systems, control processing computers, building managenent systems
|
Protek Devices
|
| M13S128324A-2M |
Double-data-rate architecture, two data transfers per clock cycle
|
Elite Semiconductor Mem...
|
| M13L2561616A-2A |
Double-data-rate architecture, two data transfers per clock cycle
|
Elite Semiconductor Mem...
|
| M13S2561616A-2A |
Double-data-rate architecture, two data transfers per clock cycle
|
Elite Semiconductor Mem...
|
| HI-8787 |
(HI-8787 / HI-8788) 16-BIT PARALLEL DATA CONVERTED 429&561 SERIAL DATA OUT
|
Holt Integrated Circuits
|
| MC68HC908JB12 MC68HC908JB12DW MC68HC908JB12JDW MC6 |
Addendum to MC68HC908JB16 Technical Data
This section updates data sheet information and introduces the 20-pin SOIC
|
FREESCALE[Freescale Semiconductor, Inc]
|
| W9412G6JH W9412G6JH-5 |
2M ?4 BANKS ?16 BITS DDR SDRAM
Double Data Rate architecture; two data transfers per clock cycle
|
Winbond
|
| HFBR-0536 HFBR-4532 HFBR-4531 |
Eval Kit for proprietary data com apps at data rates up to 32 MBd with AN 1121 figs. 3 & 4 circuits
Crimpless Connectors for Plastic Optical Fiber and Versatile Link(应用于塑料光纤和通用链接的无压接连接
Eval Kit for proprietary data com apps at data rates up to 32 MBd with AN 1121 figs. 3 & 4 circuits 评估套件与安1121无花果专有数据的COM应用程序的数据传输速率高达32万桶3
|
Agilent(Hewlett-Packard)
|
| W9412G2IB W9412G2IB4 W9412G2IB-6I |
1M × 4 BANKS × 32 BITS GDDR SDRAM
Double Data Rate architecture; two data transfers per clock cycle
4M X 32 DDR DRAM, 0.7 ns, PBGA144
|
Winbond
WINBOND ELECTRONICS CORP
|
